1. Field of the Invention
The present invention relates to a hybrid circuit for connecting a four-line device for inputting and outputting signals such as a modem, and a two-line communication line such as telephone lines.
2. Description of the Related Art
FIG. 4 is a block diagram of a hybrid circuit 103 connected between a modem (modulation and demodulation device) 101 and a telephone line 102.
As is shown in FIG. 4, the hybrid circuit 103 converts a signal from the modem 101 into a signal for the telephone line 102 having a pair of lines, and converts a signal from the telephone line 102 into a signal for the modem 101. Reference numeral 104 denotes a pair of lines through which a signal from the modem 101 is sent to the hybrid circuit 103, and reference numeral 105 denotes a pair of lines through which a signal from the hybrid circuit 103 is sent to the modem 101. Hereinafter, a pair of lines such as the pair of lines 104 will be referred to as the "signal sending line", and a line such as the pair of lines 105 will be referred to as the "signal receiving line". A signal sent through the signal sending line will be referred to as the "data sending signal", and a signal sent through the signal receiving line will be referred to as the "data receiving signal". Although the pairs of lines 102, 104 and 105 are each shown as a single line in FIG. 4, they each include two lines in practice. The hybrid circuit 103 has such a structure as to output a data sending signal sent through the signal sending line 104 to the telephone line 102 without leaking the data sending signal to the signal receiving line 105, and also as to output a data receiving signal sent through the telephone line 102 to the signal receiving line 105 without leaking the data receiving signal to the signal sending line 104.
Referring to FIGS. 5 and 6, an example of a conventional hybrid circuit will be described. FIG. 5 is a circuit diagram of a conventional hybrid circuit 106 disclosed in Japanese Laid-Open Patent Publication No. 63-84323, and FIG. 6 is a schematic circuit diagram of the hybrid circuit 106.
As is shown in FIG. 5, in the hybrid circuit 106, a data sending signal is sent to an inverting input of an operational amplifier 21 through a resistor R22. An output of the operational amplifier 21 is connected to the inverting input of the operational amplifier 21 through a resistor R23. A non-inverting input of the operational amplifier 21 is grounded. Thus, a feedback loop of the operational amplifier 21 includes the resistor R23. Due to such a structure, the operational amplifier 21 acts as an inverting amplifier. An output from the operational amplifier 21 is sent to an end of a primary coil 22a of a line transformer 22 through a resistor 21. The other end of the primary coil 22a is grounded. Two ends of a secondary coil 22b of the line transformer 22 are both connected to a pair of telephone lines 28.
An end of the resistor R21 which is on the side of the line transformer 22 is connected to a noninverting input of an operational amplifier 23, and the other end of the resistor R21 is connected to an inverting input of the operational amplifier 23 through a resistor R24. A feedback loop of the operational amplifier 23 includes a resistor R25. Due to such a structure, the operational amplifier 23 acts as a differential amplifier.
In FIG. 5, an impedance of the primary coil 22a of the line transformer 22 can be assumed to include only a resistor component (hereinafter, indicated by symbol "Z1L"). Accordingly, resistances of the resistors R21, R24 and R25 and the resistor component Z1L of the impedance of the primary coil 22a are set to have the relationship expressed by R21:Z1L=R24:R25 for simplicity. Hereinafter, the reference numerals denoting the resistors will also be used to indicate the resistances of the respective resistors.
The hybrid circuit 106 having the abovedescribed structure operates in the following manner.
First, a case where a data sending signal is inputted from a signal sending line (not shown) to the hybrid circuit 106 will be described.
The data sending signal sent to the inverting input of the operational amplifier 21 is amplified by R23/R22 (namely, by a gain .alpha.) by the operation amplifier 21 and is outputted from the operational amplifier 21. The amplified signal is sent to the primary coil 22a through the resistor R21. As a result, a voltage obtained by multiplying the voltage of the signal outputted from the operational amplifier 21 by Z1L/(R21+Z1L) is applied to the primary coil 22a. Practically, the resistances of the resistor R21 and the resistor component Z1L of the primary coil 22a are set to have the relationship expressed by R21=Z1L in order to obtain impedance matching of the line transformer 22. Accordingly, the primary coil 22a is supplied with a voltage which is 1/2 of the output voltage from the operational amplifier 21. The voltage applied to the primary coil 22a is then sent to the telephone lines 28 through the secondary coil 22b.
During the above-described operation, the output voltage from the operational amplifier 21 is also inputted to the operational amplifier 23 in the following manner.
The output voltage from the operational amplifier 21 is inputted to the inverting input of the operational amplifier 23 in the state of being divided proportionally to the resistances of R24 and R25. The output voltage is inputted to the non-inverting input of the operational amplifier 23 in the state of being divided proportionally to the resistances of R21 and Z1L. Since R21:Z1L=R24:R25, the voltage inputted to the inverting input and the voltage inputted to the non-inverting input of the operational amplifier 23 are equal to each other, and thus these two inputs counterbalance each other. As a result, the data sending signal from the operational amplifier 21 is not sent to a signal receiving line (not shown).
In the case where a data receiving signal is sent from the telephone lines 28 to the hybrid circuit 106, the hybrid circuit 106 operates in the following way.
The voltage induced to the primary coil 22a is sent to the non-inverting input of the operational amplifier 23, and also to the inverting input of the operational amplifier 23 through the resistors R21 and R24. The difference between the potential at an end of the resistor R21 on the side of the line transformer 22 and a potential at an end of the resistor R24 on the side of the operational amplifier 23 is amplified by the operational amplifier 23 by (R21+R24)/R25, and the resultant output is sent to the signal receiving line.
In the hybrid circuit 106, with regard to the data sending signal sent to the hybrid circuit 106 through the signal sending line, the resistances of the resistors R21, R24 and R25 are set in advance so that the voltages inputted to the inverting input and the non-inverting input of the operational amplifier 23 will be equal to each other. Accordingly, only the voltage induced to the primary coil 22a of the line transformer 22 is outputted to the signal receiving line as a data receiving signal.
FIG. 6 is a schematic circuit diagram of the hybrid circuit 106. ".alpha.", "1/2 " and "1" in amplifiers 24 through 26 are the gains of the respective amplifiers. Operation of the hybrid circuit 106 will be briefly described with reference to FIG. 6.
A data sending signal sent through the signal sending line (not shown) to the hybrid circuit 106 is amplified by the amplifier 24 by a gain of a and then is sent to the primary coil 22a of the line transformer through the resistor R21. As a result, the voltage obtained by amplifying the voltage of the data sending signal by a and further amplifying the resultant voltage by Z1L/(R21+Z1L) (namely, by 1/2) is applied to two ends of the primary coil 22a.
The voltage of the data sending signal is also sent to a subtracter 27 after being amplified by .alpha. by the amplifier 24 and then attenuated to be 1/2 by the amplifier 25. Namely, the voltage applied to the subtracter 27 is times the voltage of the data sending signal. The subtracter 27 also receives the voltage obtained by dividing the output from the amplifier 24 into 1/2 by the resistor R21 and then amplifying the resultant voltage by 1 by the amplifier 26. The latter voltage is also times the voltage of the data sending signal. The subtracter 27 obtains the difference between the outputs from the amplifiers 25 and 26. Since the two voltages are equal to each other, no signal is sent from the subtracter 27.
With regard to the data receiving signal from the telephone lines 28 (FIG. 5), the data receiving signal induced to the primary coil 22a is amplified by "1" by the amplifier 26 and outputted to the signal receiving line (not shown).
In conventional hybrid circuits such as the hybrid circuit 106, the voltage of the data sending signal is divided proportionally to the resistances R21 and Z1L; namely, the voltage is attenuated to be 1/2. In order to compensate for such division, the gain of the amplifier 24 or the operational amplifier 21 should be raised to approximately twice as high as .alpha.. Due to such a requirement, it is difficult to incorporate such a hybrid circuit into an LSI since signals in such a hybrid circuit cannot have low voltages, as is required for an LSI.
For example, Japanese Laid-Open Patent Publication No. 57-25731 proposes a hybrid circuit in which the voltages of the signals can be maintained low. Referring to FIG. 7, such a hybrid circuit will be described. FIG. 7 is a circuit diagram of a hybrid circuit 107.
As is illustrated in FIG. 7, a data sending signal is inputted to the hybrid circuit 107 through an operational amplifier 31. The operational amplifier 31 is a buffer amplifier provided with a negative feedback loop for inputting an output therefrom directly to an inverting input thereof. The operational amplifier has a gain of 1. The output from the operational amplifier 31 is sent to an end of a primary coil 32a of a line transformer 32 through a resistor R31 and also is sent to an inverting input of an operation amplifier 33 through a resistor R32. As is in the hybrid circuit 106, assuming an impedance Z1L of the primary coil 32a of the line transformer 32 includes only a resistor component, the resistances of the resistor R31 and the resistor component Z1L of the impedance of the primary coil 32a are set to have the relationship expressed by R31:Z1L=1:1.
The operational amplifier 33 is provided with a negative feedback loop including a resistor R33, and the non-inverting input of the operational amplifier 33 is grounded. The resistors R32 and R33 have the relationship expressed by R32:R33=1:1. Due to such a structure, the operational amplifier 33 acts as an inverting amplifier having a gain of "1". The output from the amplifier 33 is sent to the other end of the coil 32a of the line transformer 32. Two ends of a secondary coil 32b of the line transformer 32 are connected to a pair of telephone lines 29.
A junction point b of the resistor R31 and the primary coil 32a is connected to a non-inverting input of an operational amplifier 34. The operational amplifier 34 is a buffer amplifier provided with a negative feedback loop for inputting an output therefrom directly to an inverting input thereof. The operational amplifier 34 outputs a data receiving signal to a signal receiving line (not shown).
Symbol a denotes an output point of the operational amplifier 31, and symbol c denotes an output point of the operational amplifier 33. Although the resistor R31 is shown as having a variable impedance in the publication of Japanese Laid-Open Patent Publication No. 57-25731, the resistor R31 is shown as a resistor component here for simplicity. The operational amplifier 31 may be an inverting amplifier such as the operational amplifier 21 in FIG. 5 in order to adjust gain.
In the hybrid circuit 107, in the case, for example, that an instantaneous voltage at the output point a becomes +2 V by input of a data sending signal, such a voltage is applied to a series circuit including the resistor R31 and the primary coil 32a. The voltage of +2 V is also inverted by the operational amplifier 33, and so the voltage at the output point c is -2 V. The voltage of -2 V is also applied to the series circuit including the resistor R31 and the primary coil 32a. Due to the relationship expressed by R31:Z1L=1:1, the junction point b receives a voltage of +1 V, which is 1/2 of the output voltage from the operational amplifier 31 and also receives a voltage of -1 V, which is 1/2 of the output voltage from the operational amplifier 33. As a result, the voltage at the junction point b is 0 V. Accordingly, the voltage applied to the primary coil 32 is (voltage at the junction point b)-(voltage at the output point c)=+2 V. In other words, the output voltage from the operational amplifier 31 is applied to the primary coil 32a as it is. Since the voltage at the point b is constantly 0 V, the data sending signal does not leak to the output from the operational amplifier 34.
In the hybrid circuit 107 in FIG. 7, a data sending signal is not attenuated by division of the voltage thereof. Accordingly, it is not necessary to amplify a data sending signal by a high gain as is necessary in the hybrid circuit 106 illustrated in FIGS. 5 and 6. Consequently, the voltages of the signals in the hybrid circuit 107 can be maintained low, and thus the hybrid circuit 107 can suitably be incorporated into an LSI.
For hybrid circuits incorporated into an LSI, low noise is demanded as well as low voltages. Such a demand is especially great when a hybrid circuit is incorporated into an LSI together with an A/D converter, a D/A converter and the like, or other digital circuits. Noise, which is mixed into grounding wiring by the existence of the digital circuits, should be removed. By lowering the gain of amplifiers included in a hybrid circuit, the noise in the hybrid circuit can be reduced.
In the hybrid circuit 107 shown in FIG. 7, noise cannot sufficiently be removed due to the hybrid circuit 107 being connected to the grounding wiring although the gain is low.